CASE STUDIES

This section presents just a few examples of Comtel’s leading-edge technology and engineering achievements. We continue research in the areas of interest to stay competitive and push the technology edge and market boundaries.

Air-/-Plane technology

Goal: Air-/-Plane technology is a set of proprietary design techniques to achieve leading edge in high-speed performance while keeping cost increase as low as possible.

Air-/-Plane® technology is a set of proprietary design techniques to achieve leading edge in high-speed performance while keeping cost increase as low as possible.

 

Cost reduction on a backplane

Goal: Achieve continuous cost reduction to extend the product life cycle of a custom ATCA backplane.

Goal: achieve continuous cost reduction to extend the product life cycle of a custom ATCA backplane.

Challenge: apply recent research findings in practice

Result: unit cost reduced by 15%

How it was done:

  • Reduced the layer count by 20%
  • Replaced the modern and significantly more expensive ATCA ZD Pro connectors with the original ZD connectors. Also, the lead time and availability of the ZD connectors is much better than that of ZD Pro
  • Preserved the excellent high-speed capabilities of the PCB (40Gbps) despite older connectors
  • Air-/-Plane technology

Custom chassis design

Goal: Customize standard 14 slot ATCA chassis to accept enlarged RTM cards that communicate to the front ATCA cards via the common midplane.

Goal: customize standard 14 slot ATCA chassis to accept enlarged RTM cards that communicate to the front ATCA cards via the common midplane.

Challenge:

  • Collaborate with the customer to define a proprietary mechanical form-factor for the cards
  • Achieve 40% more bulk cooling due to significant power dissipation in RTM area. Ensure airflow uniformity among slots and front vs. rear
  • Redefine power architecture to bring separate power channels to RTM area
  • Achieve 40Gbps mesh connections among front slots, rear slots, and between front and rear slots on a monolithic 14 slot midplane populated from both sides.

Result: first prototypes were available within 6 months which passed customer’s validation without any significant issues

How it was done:

  • Agile project management in a dedicated team consisting of mechanical, electrical, software, and test engineers
  • Customer involvement in every critical aspect
  • Extensive signal integrity simulations
  • Building of mechanical mock-ups to pre-validate airflow

Comtel ATCA Extension Back

Chassis monitoring solutions

Goal: Design a cost-effective chassis monitoring solution with a contactless temperature measurement of a CPU blade.

Challenge:

  • CPU blade has no external interface to provide internal sensor readings
  • There is a variety of CPU blades with different thermal profiles that can be used in a chassis
  • Chassis monitoring solution must have an adaptive cooling algorithm to take into account changes in environment, payload, and various blades’ thermal profiles

Result: met customer’s technical and commercial expectations

How it was done:

  • Use existing hardware and firmware building blocks
  • Choose a suitable infra-red (IR) temperature sensor
  • Build a mock-up evaluation system to cover potential usage scenarios
  • Build a robust calibration and measurement algorithm of the IR temperature sensor that works with different blades’ thermal profiles
  • Provide an external API to the user for easy adjustment of cooling algorithm parameters

Comtel SW Management Solution Formular

Custom backplane design

Goal: Design a custom backplane simultaneously to customer’s system development

Goal: design a custom backplane simultaneously to customer’s system development

Challenge:

  • There is no detailed specification at the beginning of the project
  • Requirements change as the project advances. High-speed performance must be validated for the end-to-end transmission channel

Result: system performance passed validation both by simulation and measurements

How it was done:

  • Tight collaboration with customer’s card and system designers
  • Multiple iterations of signal integrity simulation for the backplane and the cards with corresponding updates in design
  • Design dedicated high-speed test cards to characterize the backplane
  • Independent measurements on the backplane and cards
  • Final bit error rate (BER) and link throughput test to ensure end-to-end performance

Comtel Custom Backplane Design Diagram

Performance showcase: VPX

Goal: Go beyond state-of-the-art performance on a VPX backplane and achieve 100Gbps data throughput (25 Gbps per differential pair)

Goal: go beyond state-of-the-art performance on a VPX backplane and achieve 100Gbps data throughput (25 Gbps per differential pair)

Challenge:

  • MULTIGIG connectors (VPX) were originally designed for data rates below 10 Gbps.
  • Improved MULTIGIG connectors (proprietary TE design) were out of scope
  • VPX backplane has to accommodate plenty high-speed transmission lines while delivering significant power, i.e. high current to every slot

Result: The first revision of 5 slot 6U VPX backplane with distributed architecture was successfully characterized in compliance with IEEE 802.3bj 100Gb/s Ethernet specification. No further redesign was needed.

How it was done:

  • Extensive signal integrity simulations
  • Design and characterisation of dedicated VPX test cards
  • PCB mock-ups to evaluate the performance of different connector types
  • Air-/-Plane technology

Comtel Contuct VPX 1

Performance showcase: ATCA

Goal: Design 14 slot ATCA full mesh backplane that is compliant with IEEE 802.3bj 100Gb/s Ethernet specifications and with corresponding PICMG 3.1R3.0 100Gb/s Ethernet specifications. Use original ZD connectors (not ZD+ or ZDPro)

Goal: design 14 slot ATCA full mesh backplane that is compliant with IEEE 802.3bj 100Gb/s Ethernet specifications and with corresponding PICMG 3.1R3.0 100Gb/s Ethernet specifications. Use original ZD connectors (not ZD+ or ZDPro)

Challenge:

  • Full mesh topology prescribes that every slot has a dedicated fabric connection to every other slot. This implies very dense routing through connectors
  • The longest link’s track length exceeds 430mm
  • Original ZD connectors were not designed for 25Gpbs data rate per differential pair
  • Improved ZD+ and ZDPro connectors were out of scope

Result:

  • Passed IEEE 802.3bj and PICMG 3.1R3.0 characterisation tests
  • Fermi lab (not affiliated 3rd party) performed an independent test of our backplane while comparing it with two other ATCA vendors (Read test result here):
    • All links were examined simultaneously
    • The first backplane at Fermi where channel tuning was NOT required
    • Bit error rate (BER) < 3×10-16
    • “This backplane has the largest, and most consistent eye diagrams we have ever encountered.”
    • “With [Comtel] backplane we are now getting a clearer picture of the Pulsar IIb board [Fermilab design] performance!”

How it was done:

  • Design and characterize dedicated test cards according to PICMG 3.1R3.0 standard
  • Extensive signal integrity simulations
  • Air-/-Plane technology

Split backplane technology

Goal: Eliminate a typical trade-off between power and high-speed performance when designing a 14 slot ATCA backplane

Goal: eliminate a typical trade-off between power and high-speed performance when designing a 14 slot ATCA backplane

Challenge:

  • Typical backplane must reconcile both power and high-speed requirements on a single PCB

Result:

  • Best possible high-speed performance
  • Best possible power performance
  • Power section needs to pass safety certification testing only once and remains in a system for the entire product life
  • High-Speed section can be easily exchanged in the field. This allows to prolong the life of the entire system by retrofitting a newer backplane version without need for a forklift upgrade.

How it was done:

  • Define and split Power (ATCA Zone 1) and high-speed (ATCA Zone 2&3) sections into two independent PCB
  • Validate mechanical properties of 2-PCB construction

Latest Custom High Speed Backplane 2023

Goal: Backplane for 20 FPGA-based modules with 320 Aurora links between FPGAs, Aurora links at 28Gbps and clock skew less than 1ps, 6kW power consumption of all modules, 0.6m x 0.65m backplane size, Quality for military use